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c874a3d10c
Driver Bug Fixes: ----------------- 1. Added GPL/NXP dual license header 2. WCSWREL-242: Fixed system rebooted issue after connecting wifi and running bt A2DP stress 3. WCSWREL-310: merge the L5.17 build errors and warnings related to netif_rx 4. WCSWREL-317: merge the build error and warning fix related to eth_hw_addr_set 5. WSW-19664: Fixed VtsHalWifiV1_0TargetTest failure Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
121 lines
3.3 KiB
C
121 lines
3.3 KiB
C
/** @file mlan_init.h
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*
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* @brief This file defines the FW initialization data
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* structures.
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*
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*
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* Copyright 2008-2021 NXP
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*
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* NXP CONFIDENTIAL
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* The source code contained or described herein and all documents related to
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* the source code (Materials) are owned by NXP, its
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* suppliers and/or its licensors. Title to the Materials remains with NXP,
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* its suppliers and/or its licensors. The Materials contain
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* trade secrets and proprietary and confidential information of NXP, its
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* suppliers and/or its licensors. The Materials are protected by worldwide
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* copyright and trade secret laws and treaty provisions. No part of the
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* Materials may be used, copied, reproduced, modified, published, uploaded,
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* posted, transmitted, distributed, or disclosed in any way without NXP's
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* prior express written permission.
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*
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* No license under any patent, copyright, trade secret or other intellectual
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* property right is granted to or conferred upon you by disclosure or delivery
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* of the Materials, either expressly, by implication, inducement, estoppel or
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* otherwise. Any license under such intellectual property rights must be
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* express and approved by NXP in writing.
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*
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* Alternatively, this software may be distributed under the terms of GPL v2.
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* SPDX-License-Identifier: GPL-2.0
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*
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*
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*/
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/******************************************************
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Change log:
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10/13/2008: initial version
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******************************************************/
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#ifndef _MLAN_INIT_H_
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#define _MLAN_INIT_H_
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/** Tx buffer size for firmware download*/
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#define FW_DNLD_TX_BUF_SIZE 2312
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/** Rx buffer size for firmware download*/
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#define FW_DNLD_RX_BUF_SIZE 2048
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/** Max firmware retry */
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#define MAX_FW_RETRY 3
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/** Firmware has last block */
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#define FW_HAS_LAST_BLOCK 0x00000004
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/** CMD id for CMD4 */
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#define FW_CMD_4 0x00000004
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/** CMD id for CMD6 */
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#define FW_CMD_6 0x00000006
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/** CMD id for CMD7 */
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#define FW_CMD_7 0x00000007
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/** CMD id for CMD10 */
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#define FW_CMD_10 0x0000000a
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/** Firmware data transmit size */
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#define FW_DATA_XMIT_SIZE (sizeof(FWHeader) + DataLength + sizeof(t_u32))
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/** FWHeader */
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typedef MLAN_PACK_START struct _FWHeader {
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/** FW download command */
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t_u32 dnld_cmd;
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/** FW base address */
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t_u32 base_addr;
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/** FW data length */
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t_u32 data_length;
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/** FW CRC */
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t_u32 crc;
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} MLAN_PACK_END FWHeader;
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/** FWData */
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typedef MLAN_PACK_START struct _FWData {
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/** FW data header */
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FWHeader fw_header;
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/** FW data sequence number */
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t_u32 seq_num;
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/** FW data buffer */
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t_u8 data[1];
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} MLAN_PACK_END FWData;
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/** FWSyncHeader */
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typedef MLAN_PACK_START struct _FWSyncHeader {
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/** FW sync header command */
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t_u32 cmd;
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/** FW sync header sequence number */
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t_u32 seq_num;
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/** Extended header */
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t_u32 magic;
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/** Chip rev */
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t_u32 chip_rev;
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/** Strap */
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t_u32 strap;
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/** Status */
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t_u32 status;
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/** Offset */
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t_u32 offset;
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} MLAN_PACK_END FWSyncHeader;
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/** FW Sync pkt */
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typedef MLAN_PACK_START struct _FWSyncPkt {
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/** pkt type */
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t_u32 pkt_type;
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/** FW sync header command */
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t_u32 cmd;
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/** FW sync header sequence number */
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t_u32 seq_num;
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/** chip rev */
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t_u32 chip_rev;
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/** fw status */
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t_u32 fw_ready;
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} MLAN_PACK_END FWSyncPkt;
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/** Convert sequence number and command fields
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* of fwheader to correct endian format
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*/
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#define endian_convert_syncfwheader(x)
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#endif /* _MLAN_INIT_H_ */
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