2020-12-05 11:42:54 +00:00
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/** @file moal_shim.h
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*
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* @brief This file contains declaration referring to
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* functions defined in moal module
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*
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*
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2022-04-19 06:46:37 +00:00
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* Copyright 2008-2021 NXP
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2020-12-05 11:42:54 +00:00
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*
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2022-05-27 06:35:54 +00:00
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* NXP CONFIDENTIAL
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* The source code contained or described herein and all documents related to
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* the source code (Materials) are owned by NXP, its
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* suppliers and/or its licensors. Title to the Materials remains with NXP,
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* its suppliers and/or its licensors. The Materials contain
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* trade secrets and proprietary and confidential information of NXP, its
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* suppliers and/or its licensors. The Materials are protected by worldwide
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* copyright and trade secret laws and treaty provisions. No part of the
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* Materials may be used, copied, reproduced, modified, published, uploaded,
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* posted, transmitted, distributed, or disclosed in any way without NXP's prior
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* express written permission.
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2020-12-05 11:42:54 +00:00
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*
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2022-05-27 06:35:54 +00:00
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* No license under any patent, copyright, trade secret or other intellectual
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* property right is granted to or conferred upon you by disclosure or delivery
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* of the Materials, either expressly, by implication, inducement, estoppel or
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* otherwise. Any license under such intellectual property rights must be
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* express and approved by NXP in writing.
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*
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* Alternatively, this software may be distributed under the terms of GPL v2.
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* SPDX-License-Identifier: GPL-2.0
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2020-12-05 11:42:54 +00:00
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*
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*/
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/*************************************************************
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* Change Log:
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* 10/21/2008: initial version
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************************************************************/
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#ifndef _MOAL_H
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#define _MOAL_H
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2021-04-01 03:15:14 +00:00
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mlan_status moal_get_fw_data(t_void *pmoal, t_u32 offset, t_u32 len,
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t_u8 *pbuf);
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mlan_status moal_get_vdll_data(t_void *pmoal, t_u32 len, t_u8 *pbuf);
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mlan_status moal_get_hw_spec_complete(t_void *pmoal, mlan_status status,
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mlan_hw_info *phw, pmlan_bss_tbl ptbl);
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mlan_status moal_init_fw_complete(t_void *pmoal, mlan_status status);
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mlan_status moal_shutdown_fw_complete(t_void *pmoal, mlan_status status);
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mlan_status moal_ioctl_complete(t_void *pmoal, pmlan_ioctl_req pioctl_req,
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mlan_status status);
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mlan_status moal_alloc_mlan_buffer(t_void *pmoal, t_u32 size,
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pmlan_buffer *pmbuf);
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mlan_status moal_free_mlan_buffer(t_void *pmoal, pmlan_buffer pmbuf);
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mlan_status moal_send_packet_complete(t_void *pmoal, pmlan_buffer pmbuf,
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mlan_status status);
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#ifdef USB
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mlan_status moal_recv_complete(t_void *pmoal, pmlan_buffer pmbuf, t_u32 port,
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mlan_status status);
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mlan_status moal_write_data_async(t_void *pmoal, pmlan_buffer pmbuf,
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t_u32 port);
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#endif
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#if defined(SDIO) || defined(PCIE)
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/** moal_write_reg */
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mlan_status moal_write_reg(t_void *pmoal, t_u32 reg, t_u32 data);
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/** moal_read_reg */
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mlan_status moal_read_reg(t_void *pmoal, t_u32 reg, t_u32 *data);
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#endif /* SDIO || PCIE */
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mlan_status moal_write_data_sync(t_void *pmoal, pmlan_buffer pmbuf, t_u32 port,
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t_u32 timeout);
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mlan_status moal_read_data_sync(t_void *pmoal, pmlan_buffer pmbuf, t_u32 port,
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t_u32 timeout);
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2021-12-09 04:07:20 +00:00
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mlan_status moal_recv_amsdu_packet(t_void *pmoal, pmlan_buffer pmbuf);
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2021-04-01 03:15:14 +00:00
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mlan_status moal_recv_packet(t_void *pmoal, pmlan_buffer pmbuf);
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mlan_status moal_recv_event(t_void *pmoal, pmlan_event pmevent);
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mlan_status moal_malloc(t_void *pmoal, t_u32 size, t_u32 flag, t_u8 **ppbuf);
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mlan_status moal_mfree(t_void *pmoal, t_u8 *pbuf);
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mlan_status moal_vmalloc(t_void *pmoal, t_u32 size, t_u8 **ppbuf);
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mlan_status moal_vfree(t_void *pmoal, t_u8 *pbuf);
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#ifdef PCIE
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mlan_status moal_malloc_consistent(t_void *pmoal, t_u32 size, t_u8 **ppbuf,
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t_pu64 pbuf_pa);
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mlan_status moal_mfree_consistent(t_void *pmoal, t_u32 size, t_u8 *pbuf,
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t_u64 buf_pa);
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mlan_status moal_map_memory(t_void *pmoal, t_u8 *pbuf, t_u64 *pbuf_pa,
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t_u32 size, t_u32 flag);
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mlan_status moal_unmap_memory(t_void *pmoal, t_u8 *pbuf, t_u64 buf_pa,
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t_u32 size, t_u32 flag);
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#endif /* PCIE */
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t_void *moal_memset(t_void *pmoal, t_void *pmem, t_u8 byte, t_u32 num);
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t_void *moal_memcpy(t_void *pmoal, t_void *pdest, const t_void *psrc,
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t_u32 num);
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t_void *moal_memcpy_ext(t_void *pmoal, t_void *pdest, const t_void *psrc,
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t_u32 num, t_u32 dest_size);
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t_void *moal_memmove(t_void *pmoal, t_void *pdest, const t_void *psrc,
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t_u32 num);
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t_s32 moal_memcmp(t_void *pmoal, const t_void *pmem1, const t_void *pmem2,
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t_u32 num);
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/** moal_udelay */
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t_void moal_udelay(t_void *pmoal, t_u32 udelay);
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t_void moal_usleep_range(t_void *pmoal, t_u32 min_delay, t_u32 max_delay);
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mlan_status moal_get_boot_ktime(t_void *pmoal, t_u64 *pnsec);
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mlan_status moal_get_system_time(t_void *pmoal, t_u32 *psec, t_u32 *pusec);
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mlan_status moal_init_lock(t_void *pmoal, t_void **pplock);
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mlan_status moal_free_lock(t_void *pmoal, t_void *plock);
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mlan_status moal_spin_lock(t_void *pmoal, t_void *plock);
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mlan_status moal_spin_unlock(t_void *pmoal, t_void *plock);
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#if defined(DRV_EMBEDDED_AUTHENTICATOR) || defined(DRV_EMBEDDED_SUPPLICANT)
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mlan_status moal_wait_hostcmd_complete(t_void *pmoal, t_u32 bss_index);
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mlan_status moal_notify_hostcmd_complete(t_void *pmoal, t_u32 bss_index);
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#endif
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t_void moal_print(t_void *pmoal, t_u32 level, char *pformat, IN...);
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t_void moal_print_netintf(t_void *pmoal, t_u32 bss_index, t_u32 level);
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t_void moal_assert(t_void *pmoal, t_u32 cond);
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t_void moal_hist_data_add(t_void *pmoal, t_u32 bss_index, t_u16 rx_rate,
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t_s8 snr, t_s8 nflr, t_u8 antenna);
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2021-04-01 03:15:14 +00:00
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t_void moal_updata_peer_signal(t_void *pmoal, t_u32 bss_index, t_u8 *peer_addr,
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t_s8 snr, t_s8 nflr);
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t_u64 moal_do_div(t_u64 num, t_u32 base);
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2021-04-01 03:15:14 +00:00
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mlan_status moal_init_timer(t_void *pmoal, t_void **pptimer,
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IN t_void (*callback)(t_void *pcontext),
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t_void *pcontext);
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mlan_status moal_free_timer(t_void *pmoal, t_void *ptimer);
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mlan_status moal_start_timer(t_void *pmoal, t_void *ptimer, t_u8 periodic,
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t_u32 msec);
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mlan_status moal_stop_timer(t_void *pmoal, t_void *ptimer);
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void moal_tp_accounting(t_void *pmoal, void *buf, t_u32 drop_point);
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void moal_tp_accounting_rx_param(t_void *pmoal, unsigned int type,
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unsigned int rsvd1);
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2021-10-09 02:29:40 +00:00
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void moal_amsdu_tp_accounting(t_void *pmoal, t_s32 amsdu_process_delay,
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t_s32 amsdu_copy_delay);
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2021-06-02 01:47:10 +00:00
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2022-04-19 06:46:37 +00:00
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void moal_connection_status_check_pmqos(t_void *pmoal);
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2021-06-02 01:47:10 +00:00
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#if defined(PCIE) || defined(SDIO)
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/* pmqos busfreq add request handler*/
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2021-10-09 02:29:40 +00:00
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void woal_request_busfreq_pmqos_add(t_void *pmhandle);
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2021-06-02 01:47:10 +00:00
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/* pmqos busfreq remove handler*/
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2021-10-09 02:29:40 +00:00
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void woal_release_busfreq_pmqos_remove(t_void *pmhandle);
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2021-06-02 01:47:10 +00:00
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#endif
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2020-12-05 11:42:54 +00:00
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#endif /*_MOAL_H */
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