cyw-wifi-bt: add CYW4356/CYW43430/CYW43455/CYW4339 firmware

Add CYW4356/CYW43430/CYW43455/CYW4339 WIFI & Bluetooth firmware
from Murata git repo:
firmware:
https://github.com/murata-wireless/cyw-fmac-fw.git
nvram:
https://github.com/murata-wireless/cyw-fmac-nvram.git
bluetooth hcd firmware:
https://github.com/murata-wireless/cyw-bt-patch.git

Branch:
ZP_CYW4339: battra
1MW_CYW43455: manda
1DX_CYW43430: mothra
1CX_CYW4356: manda (firmware bin file is updated from Cypress)

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>

cyw-wifi-bt/1CX_CYW4356/brcmfmac4356-pcie.txt

@@ -0,0 +1,147 @@
+#CYW4356 1CX WLCSP module for iPA, eLNA board with PCIE for production package
+NVRAMRev=$Rev: 373428 $
+sromrev=11
+boardrev=0x1202
+## boardtype is subject to change
+boardtype=0x0735
+boardflags=0x12401001
+#enable eLNA both 2G/5G
+boardflags2=0x00802000
+boardflags3=0x48000189
+#boardnum=57410 
+macaddr=00:90:4c:16:70:01
+ccode=0
+regrev=0
+antswitch=0
+pdgain5g=4
+pdgain2g=4
+tworangetssi2g=0
+tworangetssi5g=0
+femctrl=10
+vendid=0x14e4
+devid=0x43ec
+manfid=0x2d0
+#prodid=0x052e
+nocrc=1
+otpimagesize=484
+xtalfreq=37400
+rxgains2gelnagaina0=2
+rxgains2gtrisoa0=6
+rxgains2gtrelnabypa0=1
+rxgains5gelnagaina0=2
+rxgains5gtrisoa0=6
+rxgains5gtrelnabypa0=1
+rxgains5gmelnagaina0=2
+rxgains5gmtrisoa0=6
+rxgains5gmtrelnabypa0=1
+rxgains5ghelnagaina0=2
+rxgains5ghtrisoa0=6
+rxgains5ghtrelnabypa0=1
+rxgains2gelnagaina1=2
+rxgains2gtrisoa1=6
+rxgains2gtrelnabypa1=1
+rxgains5gelnagaina1=2
+rxgains5gtrisoa1=6
+rxgains5gtrelnabypa1=1
+rxgains5gmelnagaina1=2
+rxgains5gmtrisoa1=6
+rxgains5gmtrelnabypa1=1
+rxgains5ghelnagaina1=2
+rxgains5ghtrisoa1=6
+rxgains5ghtrelnabypa1=1
+rxchain=3
+txchain=3
+ag0=1
+ag1=1
+## aa2g/aa5g should be set to 3
+aa2g=3
+aa5g=3
+agbg0=2
+agbg1=2
+aga0=2
+aga1=2
+tssipos2g=1
+extpagain2g=2
+tssipos5g=1
+extpagain5g=2
+tempthresh=120
+temps_hysteresis=15
+tempoffset=255
+rawtempsense=0x1ff
+pa2gccka0=-122,7046,-772
+pa2gccka1=-139,6542,-744
+pa2ga0=-155,6342,-721
+pa2ga1=-120,6288,-674
+pa5ga0=-183,5892,-714,-181,5916,-712,-196,5769,-706,-191,5880,-714
+pa5ga1=-193,5954,-725,-194,5958,-728,-194,6078,-742,-199,5913,-727
+maxp2ga0=78
+maxp5ga0=74,74,74,74
+maxp2ga1=78
+maxp5ga1=74,74,74,74
+subband5gver=0x4
+pdoffsetcckma0=0x0
+pdoffsetcckma1=0x0
+#pdoffsetcckma0=0x4
+#pdoffsetcckma1=0x4
+pdoffset40ma0=0x0000
+pdoffset80ma0=0x0000
+pdoffset40ma1=0x0000
+pdoffset80ma1=0x0000
+cckbw202gpo=0x0000
+cckbw20ul2gpo=0x0000
+mcsbw202gpo=0xccaaaaaa
+mcsbw402gpo=0xaaaaaaaa
+dot11agofdmhrbw202gpo=0x6666
+ofdmlrbw202gpo=0xaa66
+mcsbw205glpo=0xca888888
+mcsbw405glpo=0xca888888
+mcsbw805glpo=0xcccccccc
+mcsbw205gmpo=0xca888888
+mcsbw405gmpo=0xca888888
+mcsbw805gmpo=0xcccccccc
+mcsbw205ghpo=0xca888888
+mcsbw405ghpo=0xca888888
+mcsbw805ghpo=0xcccccccc
+mcslr5glpo=0x0000
+mcslr5gmpo=0x0000
+mcslr5ghpo=0x0000
+sb20in40hrpo=0x0
+sb20in80and160hr5glpo=0x0
+sb40and80hr5glpo=0x0
+sb20in80and160hr5gmpo=0x0
+sb40and80hr5gmpo=0x0
+sb20in80and160hr5ghpo=0x0
+sb40and80hr5ghpo=0x0
+sb20in40lrpo=0x0
+sb20in80and160lr5glpo=0x0
+sb40and80lr5glpo=0x0
+sb20in80and160lr5gmpo=0x0
+sb40and80lr5gmpo=0x0
+sb20in80and160lr5ghpo=0x0
+sb40and80lr5ghpo=0x0
+dot11agduphrpo=0x0
+dot11agduplrpo=0x0
+phycal_tempdelta=25
+temps_period=15
+AvVmid_c0=2,140,2,145,2,145,2,145,2,145
+AvVmid_c1=2,140,2,145,2,145,2,145,2,145
+rssicorrnorm_c0=0,0
+rssicorrnorm_c1=0,0
+rssicorrnorm5g_c0=1,2,2,1,2,2,1,2,3,1,2,3
+rssicorrnorm5g_c1=2,3,4,2,3,4,0,1,2,0,1,2
+epsdelta2g0=0
+epsdelta2g1=0
+ofdmfilttype=1
+##cckfilttype
+#cckdigfilttype=2
+cckdigfilttype=5
+phy4350_ss_opt=1
+## SWCTRL map changed - 8/29
+swctrlmap_5g=0x02020202,0x05050404,0x04040000,0x000000,0x047
+swctrlmap_2g=0x140c140c,0x28300820,0x08200000,0x803020,0x0ff
+## muxenab to enable OOB signal - needed for final board
+#muxenab=0x11
+## to improve ACPR for low rates in 2GHz
+papdwar=4
+## to improve current consumption in tx
+tssisleep_en=0x1f

cyw-wifi-bt/1DX_CYW43430/brcmfmac43430-sdio.txt

@@ -0,0 +1,43 @@
+# 2.4 GHz, 20 MHz BW mode
+manfid=0x2d0
+prodid=0x0726
+vendid=0x14e4
+devid=0x43e2
+boardtype=0x0726
+boardrev=0x1202
+boardnum=22
+macaddr=00:90:4c:c5:12:38
+sromrev=11
+boardflags=0x00404201
+boardflags3=0x08000000
+xtalfreq=37400
+nocrc=1
+ag0=0
+aa2g=1
+ccode=ALL
+#pa0itssit=0x20
+extpagain2g=0
+pa2ga0=-145,6667,-751
+AvVmid_c0=0x0,0xc8
+cckpwroffset0=2
+maxp2ga0=74
+#txpwrbckof=6
+cckbw202gpo=0
+legofdmbw202gpo=0x88888888
+mcsbw202gpo=0xaaaaaaaa
+propbw202gpo=0xdd
+ofdmdigfilttype=18
+ofdmdigfilttypebe=18
+papdmode=1
+papdvalidtest=1
+pacalidx2g=48
+papdepsoffset=-22
+papdendidx=58
+il0macaddr=00:90:4c:c5:12:38
+wl0id=0x431b
+# muxenab defined to enable OOB IRQ. Level sensitive interrupt via WL_HOST_WAKE line. 
+muxenab=0x10
+#BT COEX deferral limit setting
+#btc_params 8 45000
+#btc_params 10 20000
+#spurconfig=0x3

cyw-wifi-bt/1MW_CYW43455/brcmfmac43455-sdio.txt

@@ -0,0 +1,114 @@
+# Cloned from bcm94345wlpagb.txt 
+NVRAMRev=$Rev: 498373 $
+sromrev=11
+vendid=0x14e4
+devid=0x43ab
+manfid=0x2d0
+prodid=0x06e4
+macaddr=00:90:4c:c5:12:38
+nocrc=1
+boardtype=0x6e4
+##boardrev - superseded by the one in OTP
+boardrev=0x1100
+xtalfreq=37400
+## tune where necessary
+#xtal_swcapio=0x6644
+boardflags=0x00080201
+boardflags2=0x40000000
+boardflags3=0x48200100
+rxchain=1
+txchain=1
+aa2g=1
+aa5g=1
+tssipos5g=1
+tssipos2g=1
+AvVmid_c0=0,157,1,126,1,126,1,126,1,126
+pa2ga0=-152,5969,-666
+pa2ga1=-143,4076,-546
+pa5ga0=-165,5736,-689,-169,5710,-692,-171,5713,-688,-173,5732,-689
+#pa5ga1=-161,3672,-510,-166,3671,-508,-169,3697,-508,-171,3854,-520
+itrsw=1
+pdoffset40ma0=0x9999
+pdoffset80ma0=0x8888
+extpagain5g=2
+extpagain2g=2
+maxp2ga0=74
+cckbw202gpo=0x0000
+ofdmlrbw202gpo=0x0022
+dot11agofdmhrbw202gpo=0x8888
+mcsbw202gpo=0xaaaaa666
+maxp5ga0=76,76,76,76
+mcsbw205glpo=0x99999955
+mcsbw205gmpo=0x99999955
+mcsbw205ghpo=0x99999955
+mcsbw405glpo=0xff999555
+mcsbw405gmpo=0xff999555
+mcsbw405ghpo=0xff999555
+mcsbw805glpo=0xfffffbbb
+mcsbw805gmpo=0xfffffbbb
+mcsbw805ghpo=0xfffffbbb
+swctrlmap_2g=0x00040004,0x00020002,0x00040004,0x010a02,0x1ff
+swctrlmap_5g=0x00100010,0x00200020,0x00200020,0x010a02,0x2f4
+swctrlmapext_5g=0x00000000,0x00000000,0x00000000,0x000000,0x000
+swctrlmapext_2g=0x00000000,0x00000000,0x00000000,0x000000,0x000
+vcodivmode=1
+##filter parameters -- tune where necessary
+cckdigfilttype=6
+fdss_level_2g=2
+fdss_level_5g=2
+## added by apps
+aga0=0x1
+agbg0=0x1
+ccode=0
+ed_thresh2g=-65
+ed_thresh5g=-65
+ltecxmux=0
+ltecxpadnum=0x0504
+ltecxfnsel=0x22
+ltecxgcigpio=0x32
+pdoffsetcckma0=0x0000
+powoffs2gtna0=0,0,0,0,0,0,0,0,0,0,0,0,0,0
+tempthresh=120
+temps_hysteresis=15
+rawtempsense=0x1ff
+tworangetssi2g=1
+tworangetssi5g=0
+lowpowerrange2g=0
+lowpowerrange5g=0
+ag0=1
+ag1=1
+#subband5gver=0x4
+mcslr5glpo=0x0000
+mcslr5gmpo=0x0000
+mcslr5ghpo=0x0000
+sb20in40hrpo=0x0
+sb20in80and160hr5glpo=0x0
+sb40and80hr5glpo=0x0
+sb20in80and160hr5gmpo=0x0
+sb40and80hr5gmpo=0x0
+sb20in80and160hr5ghpo=0x0
+sb40and80hr5ghpo=0x0
+sb20in40lrpo=0x0
+sb20in80and160lr5glpo=0x0
+sb40and80lr5glpo=0x0
+sb20in80and160lr5gmpo=0x0
+sb40and80lr5gmpo=0x0
+sb20in80and160lr5ghpo=0x0
+sb40and80lr5ghpo=0x0
+dot11agduphrpo=0x0
+dot11agduplrpo=0x0
+phycal_tempdelta=25
+temps_period=15
+btc_mode=1
+sbpowoffs5g20mtna0=0,0,0,0
+sbpowoffs5g40mtna0=0,0,0,0
+sbpowoffs5g80mtna0=0,0,0,0 
+powoffs5g20mtna0=0,0,0,0,0,0,0
+powoffs5g40mtna0=0,0,0,0,0
+powoffs5g80mtna0=0,0,0,0,0
+ldo1=5
+cbfilttype=2
+xtal_swcapio=0x8855
+fdss_level_ch13=1,1
+# muxenab defined to enable OOB IRQ. Level sensitive interrupt via WL_HOST_WAKE line. 
+muxenab=0x10

cyw-wifi-bt/SCR-cyw.txt

@@ -2,7 +2,7 @@ NXP Software Content Register
 
 --------------------------------------------
 
-Package:                   1FD_CYW4359
+Package:                   1FD_CYW4359,1CX_CYW4356,1DX_CYW43430,1MW_CYW43455, and ZP_CYW4339
 Outgoing License:          LA_OPT_NXP_Software_License - Production Use, Section 2.3 applies
 License File:              EULA.txt
 Package Category:          BSP

cyw-wifi-bt/ZP_CYW4339/brcmfmac4339-sdio.txt

@@ -0,0 +1,102 @@
+# Sample NVRAM for BCM94339 WLCSP with eTR,iPA, and eLNA. 
+sromrev=11
+boardrev=0x1100
+boardtype=0x06c9
+boardflags=0x10081401
+boardflags2=0x00000000
+boardflags3=0x08001188
+#boardnum=57410 
+macaddr=00:90:4c:c5:12:38
+ccode=0
+regrev=0
+antswitch=0
+pdgain2g=7
+pdgain5g=7
+tworangetssi2g=0
+tworangetssi5g=0
+vendid=0x14e4
+devid=0x43ae
+manfid=0x2d0
+#prodid=0x052e
+nocrc=1
+otpimagesize=502
+xtalfreq=37400
+extpagain2g=2
+pdetrange2g=2
+extpagain5g=2
+pdetrange5g=2
+rxgains2gelnagaina0=2
+rxgains2gtrisoa0=6
+rxgains2gtrelnabypa0=1
+rxgains5gelnagaina0=4
+rxgains5gtrisoa0=4
+rxgains5gtrelnabypa0=1
+rxchain=1
+txchain=1
+aa2g=1
+aa5g=1
+tssipos5g=0
+tssipos2g=0
+pa2ga0=0xFF47,0x17B5,0xFD2B
+pa2gccka0=0xFF5F,0x1B46,0xFCCC
+pa5ga0=0xff54,0x16ec,0xfd45,0xff52,0x16a1,0xfd4d,0xff46,0x15b7,0xfd5a,0xff56,0x156d,0xfd79
+pa5gbw40a0=0xff59,0x17ca,0xfd30,0xff42,0x163d,0xfd4b,0xff31,0x152e,0xfd55,0xff60,0x16d8,0xfd54
+pa5gbw80a0=0xff56,0x1740,0xfd3f,0xff50,0x1738,0xfd3d,0xff4d,0x16b4,0xfd42,0xff58,0x1634,0xfd60
+# Default Target Power for 2G -- 17dBm(11)/14dBm(54)/13dBm(MCS7)/12dBm(MCS8)/12dBm(MCS9)
+maxp2ga0=74
+maxp5ga0=74,74,74,74
+cckbw202gpo=0x0000
+cckbw20ul2gpo=0x0000
+mcsbw202gpo=0xaa888888
+mcsbw402gpo=0xaa888888
+dot11agofdmhrbw202gpo=0x6666
+ofdmlrbw202gpo=0x0066
+tssifloor2g=500
+# Default Target Power for 5G -- 14dBm(54)/13dBm(MCS7)/12dBm(MCS8)/12dBm(MCS9)
+mcsbw205glpo=0xaa866666
+mcsbw405glpo=0xaa866666
+mcsbw805glpo=0xaa866666
+mcsbw205gmpo=0xaa866666
+mcsbw405gmpo=0xaa866666
+mcsbw805gmpo=0xaa866666
+mcsbw205ghpo=0xaa866666
+mcsbw405ghpo=0xaa866666
+mcsbw805ghpo=0xaa866666
+mcslr5glpo=0x0000
+mcslr5gmpo=0x0000
+mcslr5ghpo=0x0000
+sb20in40hrpo=0x0
+sb20in80and160hr5glpo=0x0
+sb40and80hr5glpo=0x0
+sb20in80and160hr5gmpo=0x0
+sb40and80hr5gmpo=0x0
+sb20in80and160hr5ghpo=0x0
+sb40and80hr5ghpo=0x0
+sb20in40lrpo=0x0
+sb20in80and160lr5glpo=0x0
+sb40and80lr5glpo=0x0
+sb20in80and160lr5gmpo=0x0
+sb40and80lr5gmpo=0x0
+sb20in80and160lr5ghpo=0x0
+sb40and80lr5ghpo=0x0
+dot11agduphrpo=0x0
+dot11agduplrpo=0x0
+phycal_tempdelta=25
+cckdigfilttype=2
+swctrlmap_5g=0x00080008,0x00500010,0x00100008,0x000000,0x078
+swctrlmap_2g=0x00010001,0x00220002,0x00020001,0x042202,0x1ff
+swctrlmapext_5g=0x00000000,0x00000000,0x00000000,0x000000,0x000
+swctrlmapext_2g=0x00000000,0x00000000,0x00000000,0x000000,0x000
+#
+# muxenab defined to enable OOB IRQ. Level sensitive interrupt via WL_HOST_WAKE line. 
+muxenab=0x10
+#sd_gpout=0
+#sd_oobonly=1
+#
+rssicorrnorm_c0=-2,0
+rssicorrnorm5g_c0=3,5,2,3,4,2,2,3,1,2,3,1
+## ED threshold level to address the new ETSI requirement - 10/31/2013
+ed_thresh2g=-77
+ed_thresh5g=-77
+#
+paparambwver=1