mirror of
https://github.com/NXP/imx-firmware.git
synced 2024-11-16 01:15:35 +00:00
103 lines
2.5 KiB
Text
103 lines
2.5 KiB
Text
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# Sample NVRAM for BCM94339 WLCSP with eTR,iPA, and eLNA.
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sromrev=11
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boardrev=0x1100
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boardtype=0x06c9
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boardflags=0x10081401
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boardflags2=0x00000000
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boardflags3=0x08001188
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#boardnum=57410
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macaddr=00:90:4c:c5:12:38
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ccode=0
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regrev=0
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antswitch=0
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pdgain2g=7
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pdgain5g=7
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tworangetssi2g=0
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tworangetssi5g=0
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vendid=0x14e4
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devid=0x43ae
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manfid=0x2d0
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#prodid=0x052e
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nocrc=1
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otpimagesize=502
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xtalfreq=37400
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extpagain2g=2
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pdetrange2g=2
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extpagain5g=2
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pdetrange5g=2
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rxgains2gelnagaina0=2
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rxgains2gtrisoa0=6
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rxgains2gtrelnabypa0=1
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rxgains5gelnagaina0=4
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rxgains5gtrisoa0=4
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rxgains5gtrelnabypa0=1
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rxchain=1
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txchain=1
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aa2g=1
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aa5g=1
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tssipos5g=0
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tssipos2g=0
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pa2ga0=0xFF47,0x17B5,0xFD2B
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pa2gccka0=0xFF5F,0x1B46,0xFCCC
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pa5ga0=0xff54,0x16ec,0xfd45,0xff52,0x16a1,0xfd4d,0xff46,0x15b7,0xfd5a,0xff56,0x156d,0xfd79
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pa5gbw40a0=0xff59,0x17ca,0xfd30,0xff42,0x163d,0xfd4b,0xff31,0x152e,0xfd55,0xff60,0x16d8,0xfd54
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pa5gbw80a0=0xff56,0x1740,0xfd3f,0xff50,0x1738,0xfd3d,0xff4d,0x16b4,0xfd42,0xff58,0x1634,0xfd60
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# Default Target Power for 2G -- 17dBm(11)/14dBm(54)/13dBm(MCS7)/12dBm(MCS8)/12dBm(MCS9)
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maxp2ga0=74
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maxp5ga0=74,74,74,74
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cckbw202gpo=0x0000
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cckbw20ul2gpo=0x0000
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mcsbw202gpo=0xaa888888
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mcsbw402gpo=0xaa888888
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dot11agofdmhrbw202gpo=0x6666
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ofdmlrbw202gpo=0x0066
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tssifloor2g=500
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# Default Target Power for 5G -- 14dBm(54)/13dBm(MCS7)/12dBm(MCS8)/12dBm(MCS9)
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mcsbw205glpo=0xaa866666
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mcsbw405glpo=0xaa866666
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mcsbw805glpo=0xaa866666
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mcsbw205gmpo=0xaa866666
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mcsbw405gmpo=0xaa866666
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mcsbw805gmpo=0xaa866666
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mcsbw205ghpo=0xaa866666
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mcsbw405ghpo=0xaa866666
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mcsbw805ghpo=0xaa866666
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mcslr5glpo=0x0000
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mcslr5gmpo=0x0000
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mcslr5ghpo=0x0000
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sb20in40hrpo=0x0
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sb20in80and160hr5glpo=0x0
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sb40and80hr5glpo=0x0
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sb20in80and160hr5gmpo=0x0
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sb40and80hr5gmpo=0x0
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sb20in80and160hr5ghpo=0x0
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sb40and80hr5ghpo=0x0
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sb20in40lrpo=0x0
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sb20in80and160lr5glpo=0x0
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sb40and80lr5glpo=0x0
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sb20in80and160lr5gmpo=0x0
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sb40and80lr5gmpo=0x0
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sb20in80and160lr5ghpo=0x0
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sb40and80lr5ghpo=0x0
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dot11agduphrpo=0x0
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dot11agduplrpo=0x0
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phycal_tempdelta=25
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cckdigfilttype=2
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swctrlmap_5g=0x00080008,0x00500010,0x00100008,0x000000,0x078
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swctrlmap_2g=0x00010001,0x00220002,0x00020001,0x042202,0x1ff
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swctrlmapext_5g=0x00000000,0x00000000,0x00000000,0x000000,0x000
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swctrlmapext_2g=0x00000000,0x00000000,0x00000000,0x000000,0x000
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#
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# muxenab defined to enable OOB IRQ. Level sensitive interrupt via WL_HOST_WAKE line.
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muxenab=0x10
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#sd_gpout=0
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#sd_oobonly=1
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#
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rssicorrnorm_c0=-2,0
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rssicorrnorm5g_c0=3,5,2,3,4,2,2,3,1,2,3,1
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## ED threshold level to address the new ETSI requirement - 10/31/2013
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ed_thresh2g=-77
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ed_thresh5g=-77
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#
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paparambwver=1
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